Paper 2011/155

High-speed Hardware Implementation of Rainbow Signatures on FPGAs

Shaohua Tang, Haibo Yi, Huan Chen, Guomin Chen, and Jintai Ding

Abstract

We propose a new efficient hardware implementation of Rainbow signature scheme. We enhance the implementation in three directions. First, we develop a new parallel hardware design for the Gaussian elimination to solve a n*n linear system with only n clock cycles. Second, a novel multiplier was designed to speed up multiplication of three elements over a finite field. Third, we further optimize the parallelization process of the hardware to generate the Rainbow signature. By integrating these optimizations, we build a new hardware implementation, which takes only 198 clock cycles to generate a Rainbow signature, a new record in generating digital signatures and four times faster than the 804-clock-cycle Balasubramanian-Bogdanov-Carter-Ding-Rupp design with similar parameters.

Metadata
Available format(s)
-- withdrawn --
Publication info
Published elsewhere. Unknown where it was published
Keywords
Field-Programmable Gate Array (FPGA)digital signatureRainbowfinite fieldGaussian elimination.
Contact author(s)
shtang @ ieee org
haibo yi87 @ gmail com
huangege @ qq com
sarlmolapple @ gmail com
jintai ding @ mail uc edu
History
2011-06-30: withdrawn
2011-03-30: received
See all versions
Short URL
https://ia.cr/2011/155
License
Creative Commons Attribution
CC BY
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