Paper 2021/247

Generic Hardware Private Circuits - Towards Automated Generation of Composable Secure Gadgets

David Knichel, Pascal Sasdrich, and Amir Moradi

Abstract

With an increasing number of mobile devices and their high accessibility, protecting the implementation of cryptographic functions in the presence of physical adversaries has become more relevant than ever. Over the last decade, a lion’s share of research in this area has been dedicated to developing countermeasures at an algorithmic level. Here, masking has proven to be a promising approach due to the possibility of formally proving the implementation’s security solely based on its algorithmic description by elegantly modeling the circuit behavior. Theoretically verifying the security of masked circuits becomes more and more challenging with increasing circuit complexity. This motivated the introduction of security notions that enable masking of single gates while still guaranteeing the security when the masked gates are composed. Systematic approaches to generate these masked gates – commonly referred to as gadgets – were restricted to very simple gates like 2-input AND gates. Simply substituting such small gates by a secure gadget usually leads to a large overhead in terms of fresh randomness and additional latency (register stages) being introduced to the design. In this work, we address these problems by presenting a generic framework to construct trivially composable and secure hardware gadgets for arbitrary vectorial Boolean functions, enabling the transformation of much larger sub-circuits into gadgets. In particular, we present a design methodology to generate first-order secure masked gadgets which is well-suited for integration into existing Electronic Design Automation (EDA) tools for automated hardware masking as only the Boolean function expression is required. Furthermore, we practically verify our findings by conducting several case studies and show that our methodology outperforms various other masking schemes in terms of introduced latency or fresh randomness – especially for large circuits.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Published by the IACR in TCHES 2022
Keywords
MaskingGeneric and Composable Hardware GadgetsAutomated MaskingSide-Channel Analysis
Contact author(s)
david knichel @ rub de
pascal sasdrich @ rub de
amir moradi @ rub de
History
2021-10-14: last of 2 revisions
2021-03-02: received
See all versions
Short URL
https://ia.cr/2021/247
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2021/247,
      author = {David Knichel and Pascal Sasdrich and Amir Moradi},
      title = {Generic Hardware Private Circuits - Towards Automated Generation of Composable Secure Gadgets},
      howpublished = {Cryptology ePrint Archive, Paper 2021/247},
      year = {2021},
      note = {\url{https://eprint.iacr.org/2021/247}},
      url = {https://eprint.iacr.org/2021/247}
}
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