Paper 2019/1369

Impeccable Circuits II

Aein Rezaei Shahmirzadi, Shahram Rasoolzadeh, and Amir Moradi

Abstract

Protection against active physical attacks is of serious concerns of cryptographic hardware designers. Introduction of SIFA invalidating several previously-thought-effective countermeasures, made this challenge even harder. Here in this work we deal with error correction, and introduce a methodology which shows, depending on the selected adversary model, how to correctly embed error-correcting codes in a cryptographic implementation. Our construction guarantees the correction of faults, in any location of the circuit and at any clock cycle, as long as they fit into the underlying adversary model. Based on case studies evaluated by open-source fault diagnostic tools, we claim protection against SIFA.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Published elsewhere. De­sign Au­to­ma­ti­on Con­fe­rence, DAC 2020
Keywords
fault-injection attackSIFAerror correction
Contact author(s)
amir moradi @ rub de
History
2020-04-02: last of 2 revisions
2019-11-28: received
See all versions
Short URL
https://ia.cr/2019/1369
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2019/1369,
      author = {Aein Rezaei Shahmirzadi and Shahram Rasoolzadeh and Amir Moradi},
      title = {Impeccable Circuits II},
      howpublished = {Cryptology ePrint Archive, Paper 2019/1369},
      year = {2019},
      note = {\url{https://eprint.iacr.org/2019/1369}},
      url = {https://eprint.iacr.org/2019/1369}
}
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