Paper 2020/480
Low-Latency ASIC Algorithms of Modular Squaring of Large Integers for VDF Evaluation
Ahmet Can Mert, Erdinc Ozturk, and Erkay Savas
Abstract
This study is an attempt in quest of the fastest hardware algorithms for the computation of the evaluation component of verifiable delay functions (VDFs),
Metadata
- Available format(s)
- Category
- Implementation
- Publication info
- Preprint. MINOR revision.
- Keywords
- Verifiable Delay FunctionsModular SquaringReductionMontgomeryRedundant Representation
- Contact author(s)
-
ahmetcanmert @ sabanciuniv edu
erdinco @ sabanciuniv edu
erkays @ sabanciuniv edu - History
- 2020-09-18: revised
- 2020-04-28: received
- See all versions
- Short URL
- https://ia.cr/2020/480
- License
-
CC BY
BibTeX
@misc{cryptoeprint:2020/480, author = {Ahmet Can Mert and Erdinc Ozturk and Erkay Savas}, title = {Low-Latency {ASIC} Algorithms of Modular Squaring of Large Integers for {VDF} Evaluation}, howpublished = {Cryptology {ePrint} Archive, Paper 2020/480}, year = {2020}, url = {https://eprint.iacr.org/2020/480} }